Defense: Memristor-based Ternary Content Addressable Memory for Data-Intensive Applications

Speaker Name: 
Le Zheng
Speaker Title: 
Graduate Student
Speaker Organization: 
Electrical Engineering
Start Time: 
Tuesday, December 23, 2014 - 10:00am
End Time: 
Tuesday, December 23, 2014 - 12:00pm
Location: 
Engineering 2, Room 280
Organizer: 
Sung-Mo Steve Kang

Abstract

Data-intensive storage and computing systems call for continuing advancements both in data latency and energy efficiency. However, the major benefits from CMOS technologies, such as high packing density and processing speed, are getting desensitized primarily due to the prohibitively increasing power density. In order for the next generation storage and computing systems to be capable of high performance data-intensive applications, it is necessary to continue innovations in creating new circuits and system architectures, together with searching for new materials and devices.

The memristor, short for memory resistor, is a two-terminal passive device whose resistance is controlled by external electrical signals and exhibits nonvolatile memory function. Due to its capabilities of nonvolatile resistive memories, nanoscale miniaturization in an ultra-high packing density, and intriguing nonlinear dynamics, the memristors are being widely investigated to create new advanced circuit functions and to complement CMOS systems. The memristor technologies will lead current CMOS-based storage and computing systems to the data-intensive electronic systems, with significantly reduced stand-by power, form factor and manufacturing cost.

Developing compact models for the memristor is essential to facilitate circuit analyses and designs with memristors. While the previously reported memristor models exhibit several limitations in the model stability, versatility and adaptability, we propose a new module-based memristor model that covers a wide range of diverse memristor behaviors. Coincident to the theoretic memristor behaviors, the proposed model uniquely reveals that an effective charge-flux constitutive relationship can always be obtained from various types of memristors. The stability of the proposed model is also significantly enhanced by adapting the new charge (or flux)-based window function.

Associative lookup functions with high throughputs are widely implemented as in Ternary Content Addressable Memories (TCAMs). The TCAM holds the potential to curb the latency and power requirements of data-intensive systems. However the mostly common CMOS-based TCAMs that utilize Static Ramdom Access Memories (SRAMs) for storage units exhibit several limitations in its applicability due to the low storage density and high power consumption. We propose a memristor-based ternary content addressable memory (mTCAM) for data-intensive applications. A novel bit cell structure is presented that not only minimizes the bit cell area but also is capable of performance optimizations with latency and power consumption. Detailed design issues such as voltage compliance to ensure correct write/search operations, parameter-dependent sensing margins and device variations are also discussed. Simulation results demonstrate The TCAM functions of the proposed mTCAM are demonstrated through circuit level computer simulations, with competitive latency and power performance to those of CMOS counterparts.