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Computational Storage, an Architecture for Processing Data at Scale

Speaker Name: 
Pankaj Mehra
Start Time: 
Friday, January 22, 2021 - 12:00pm
End Time: 
Friday, January 22, 2021 - 1:05pm
Shel Finkelstein


The ability to compute near data is a well understood concept in system architecture. It improves latency and parallelism, and potentially improves throughput. The concept of computational storage can be realized at multiple levels of system integration. In this talk, I will survey the past, map the present, and chart out the future of computational storage. I will illustrate computational storage architecture and benefits using five principal application areas. The theme of computational storage aligns well with the decadal plan for the semiconductor industry. I will explain how by explaining how computational storage can be modeled as a marriage of bits, cores, and fabrics which are the fundamental elements of infrastructure. The final part of the talk will examine technologies at software and system level that enable computational storage at infrastructure and device level. The talk ends with long term outlook and key problems that must be solved before maximum benefit can be realized.


Pankaj Mehra led SmartSSD and other workload-optimized flash storage products as VP of Storage Pathfinding at Samsung. Previously, he was VP and Senior Fellow at Western Digital and SanDisk, following the acquisition of Fusion-io where he was SVP and CTO. As a Distinguished Technologist of HP, Pankaj founded HP Labs Russia and He was also the founder of startups IntelliFabric, Whodini and AwarenaaS. He has published 3 books and 100 papers and patents covering system architecture, context aware computing, and machine learning.
Note:  Zoom discussion with the speaker may continue after presentation until about 2:00pm.
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