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Building Cache-Coherent, Heterogeneous-ISA Processors Using P-Mesh

Speaker Name: 
Jonathan Balkind
Speaker Title: 
Assistant Professor in the Department of Computer Science
Speaker Organization: 
University of California, Santa Barbara
Start Time: 
Tuesday, March 9, 2021 - 4:00pm
End Time: 
Tuesday, March 9, 2021 - 5:00pm
Via Zoom
Assistant Professor Scott Beamer


P-Mesh is the manycore cache coherence system underlying the OpenPiton research platform, which originally used the SPARCv9 ISA. P-Mesh was recently extended in the building of the Bring Your Own Core (BYOC) platform for enabling heterogeneous-ISA systems research. BYOC enabled the development of both the first open-source, general-purpose, heterogeneous-ISA processor (JuxtaPiton) and the first open-source, SMP Linux-booting RISC-V manycore (OpenPiton+Ariane). By providing our novel interface for the connection of processor cores into the ISA-agnostic P-Mesh coherence system, one can bring a core of their choice and turn it into a heterogeneous manycore system with minimal effort. With this we have built multiple heterogeneous-ISA prototypes and connected more than ten cores of ISAs including RISC-V, x86, SPARC, and OpenPOWER. In this talk I will introduce P-Mesh and the changes made to turn it into an ISA-agnostic memory system. I will further detail the specific changes needed to support different ISAs, the new Transaction-Response Interface (TRI) for connecting cores, and efforts to support cores using new, open ISAs like RISC-V and OpenPOWER.


Jonathan Balkind is an Assistant Professor in the Department of Computer Science at the University of California, Santa Barbara. His research interests lie at the intersection of Computer Architecture, Programming Languages, and Operating Systems. Jonathan was previously a PhD Candidate in Computer Science at Princeton University where he was the Lead Architect of OpenPiton and its heterogeneous-ISA descendent, BYOC, which are productive research platforms with thousands of downloads from over 70 countries worldwide. In developing Piton (a 25-core OpenPiton ASIC), Jonathan's verification effort helped ensure a functional, Linux-booting chip, a notable accomplishment for a small academic team's first chip. Jonathan was a Class of 2018 Siebel Scholar and recipient of the Gordon Y.S. Wu Fellowship in Engineering.

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