News and Announcements

Important News and Announcements for the class will be posted here.

The final will be closed book closed notes, calculators allowed. The formula sheet from the midterm will be provided.

The Homework 5 Solution has been posted as well as the notes from lecture 20..

PSpice Notes: I spent some time after class with Jeff getting his installation to work. The student version is substantially different from my professional version. The standard installation now seems to be in C:/programs/ (which at least better conforms to standard windows practice) both the libraries it seems can go into capture/library/pspice. Although this directory appears to be in the search path for the PSPICE program we needed to explicitly include the file in the simulation profile as was Aaron's experience..
To do this, in CAPTURE go to the PSPICE menu and choose "edit simulation profile" or "new simulation profile." In the pop up box click on the libraries tab and then browse to the library named Razavi (where ever you put Rzavi.lib) and select it, this is a text file which you can also open and look at using any text editor. Now the netlist should properly generate and PSPICE will faithfully produce new and more cryptic error messages... The problem we had is that none of the standard library versions of the ground node are named "0" anymore. Without this you will get an error that all the nodes are floating. To fix this you need to double click on the ground symbol in the Capture schematic and in the resulting properties window edit the part name to "0", that is Zero not oh. Hopefully this will save you several hours of tearing your hair out and deciphering poorly written help files. If you have any other suggestions, edits to this text etc. please email them to me and I will post hem here for the rest of the class.

Be sure you read and understand this website, this site serves as the course syllabus.

Although EE178 was listed as a prerequisite I plan to drop this requirement in the future. The semiconductor device knowledge helps but if you read and understand chapter 2 in the course text book then you should have sufficient background to take this class. If you do not have EE178 or equivalent please read this chapter before the first class.

My recommendation to all students considering this class is to get the book and read the first two chapters and, if it has been awhile since you have seen this material, read the first 3. We will be reviewing this material but the device material review will be brief and the single stage amplifier material will be presented from a point of view that may be a bit novel compared as to how you were taught. Most students have encountered these basic stages in the context of bipolar transistors so understanding how they work in MOS will take a bit of adjustment.

Course Description

Credit Hours: 5 Units

Analog integrated circuit design with emphasis on fundamentals of designing linear circuits using CMOS. Covers MOS devices and device modeling, current mirrors, op-amp design, op-amp compensation, comparators, multipliers, voltage references, sample-and-holds, noise, and an introduction to more complicated systems using these building blocks, such as phase locked loops and analog-to-digital converters. If time permits, integrated circuit layout issues and device/circuit fabrication. Students cannot receive credit for this course and course 172.

Prerequisites:

EE171 Analog Circuits or Equivalent background

EE178 Semiconductor Devices Recommended (Read Chapter 2 in the course text before the first class meeting if you do not have this background)

Where: Lecture at Merrill Acad 132

When: Tuesdays and Thursdays 4-5:45 pm The first class meets on April 3rd.

Final: Monday June 11th, 7:30-10:30 pm in Merril Acad 132 (the regular classroom)

Warning: Check your calendars, be sure that you can make the final, and, for instance are not planning to try to leave town early, alternatives can only be offered in the more dire circumstances.

Course outline:

Integrated Circuit Devices and Modeling
Processing and Layout
Review of Single-Stage Amplifiers and Current Sources
Noise Analysis and Modeling
Current and Voltage References, Supply Independent Biasing
Basic Op-Amp Design
Two Stage Amplifier
Frequency Response
Stability Compensation
Comparators
Switched Capacitor Circuits
Special Topics (Time Permitting)

Ken Pedrotti

Last updated: June 10, 2007