After reading sections 6.2 and 6.3, you should be able to answer to the following questions.
  1. Section 6.2:
  2. What are the definitions of logic-0 and logic-1 noise margins (meaning of figure 6.10)?
  3. What is fan-out?
  4. If the fan out is too high, what are the two major drawbacks?
  5. What is the static (quiescent) power dissipation?
  6. What is the dynamic power dissipation?
  7. Define rise time, fall time and the propagation delay?
  8. What is a glitch?
  9. Section 6.3:
  10. In a resistor pull up NMOS inverter (Fig. 6.18), calculate the static power dissipation. (see example 6.1)
  11. In a resistor pull up NMOS inverter (Fig. 6.18), calculate the output logic high and low voltages (VOH and VOL)? (see example 6.1)
  12. Explain what the graph in Fig. 6.19 displays.
  13. Plot the transfer characteristics Vo versus Vi for the inverter
  14. You can skip the details about SPICE simulations PP. 368-370.