CMPE 126 - Advanced Logic Design - Fall 2006

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General Class Information

  • Lecture times: Tuesday & Thursday, 10-11:45 PM
  • Class: Social Sciences I, 153
  • Lab: BE 113
  • Instructor: Jose Renau
    Office Hours: Friday/Thursday, 4:00-5:00 PM
    Office: E2 227
  • Text book (optional): Verilog Styles for Synthesis of Digital Systems
  • Newsgroup: ucsc.class.cmpe126
    Mailing list interface for the newsgroup

Grading

  • Homeworks: 35%
  • Project: 40%
  • Exams: 25% (10% midterm, 15% final)
  • Projects: (10% Coding Style, 10% Passing testbench, 20% Ranking)

Policy

  • Exams are close book. You only can bring pencil and paper.
  • Late policy: 1 minute late, no grade
  • Homeworks are done INDIVIDUALLY.