Disclaimer:  This is a rough schedule of topics we will cover this quarter. It is subject to change. As mentioned in class, the lectures don't follow the text closely. 
The readings listed are to provide some backup to the material covered in lecture.  There are topics we will cover in the lecture which do not appear in the text.  There are topics in the text we will not cover.
 Also we will often talk about the labs and design tools in class, either in anticipation of the Lab Assignments or in response to questions.
Week   Date Topics Due Reading 3rd Edition and Custom Text Reading 1st and 2nd Editions
1 9-Jan Monday Switching Theory, Boolean functions and expressions, Truth Tables   Section 2.1-2.3 Section 2.1-2.3
11-Jan Wednesday  Course overview, Boolean Algebra   Section 2.5 Section 2.5
13-Jan Friday Logic networks, timing diagrams, Venn diagrams, Min-terms   Section 2.4 Section 2.4
2 16-Jan Monday HOLIDAY   Section 2.6-2.8 Section 2.6-2.8  
18-Jan Wednesday  Max-terms, Synthesis, SOP, POS, NAND-NAND, NOR-NOR  Homework 1  Section 2.11-2.12 Section 4.1-4.2
20-Jan Friday K-maps   Section 4.1-4.3 Sections 6.1-6.3
3 23-Jan Monday Multiplexers      
25-Jan Wednesday  Kmaps SOP, POS   Section 2.13 Section 4.3
27-Jan Friday 5-variable Kmaps, Don't Cares Homework 2 Section 2.14 Section 4.4
4 30-Jan Monday The D Flip-Flop, shift registers, serial parity checker   Sections 5.7-5.8 Sections 7.7-7.8
1-Feb Wednesday  Counters Homework 3 Sections 5.9.2-5.9.3, 5.11-5.11.2, skip 5.9.1 Sections 7.9.2-7.9.3, 7.11-7.11.2, skip 7.9.1
3-Feb Friday Midterm 1      
5 6-Feb Monday Analysis of Sequential Circuit, State Diagram, Dead states, Synchronizers   Section 6.1, pages 397-398 Section 8.1, pages 555-556
8-Feb Wednesday  Synthesis of Sequential Circuit, Mealy and Moore   Sections 6.1 and 6.3 Sections 8.1 and 8.3
10-Feb Friday Synthesis, One-Hot encoding   Section 6.2 Section 8.2
6 13-Feb Monday TAPS Bike Counter   Slides  Slides 
15-Feb Wednesday  Arbiter, Mealy vs Moore, Combinational Loops,    Section 6.8 Section 8.8
17-Feb Friday Combinational Loops, State minimization Homework 4 Section 6.6 Section 8.6
7 20-Feb Monday HOLIDAY      
22-Feb Wednesday  Other FFs, Activation tables, Modifying counters   Section 7.4 Section 10.2.3
24-Feb Friday Lab 7 demo,      
8 27-Feb Monday Sequential multiplier      
1-Mar Wednesday  Horner's Rule Homework 5    
3-Mar Friday Midterm 2      
9 6-Mar Monday CMOS transistor networks   Sections B.1-B.3 Sections 3.1-3.3
8-Mar Wednesday  CMOS, delay, static timing vs dynamic   Delay Slides Delay Slides
10-Mar Friday Design of D FFs and timing requirements   FF Slides, Sections 5.1-5.4 FF Slides, Sections 7.1-7.4
10 13-Mar Monday FFs(cont), Lab 8, Noise Margins, Fanout, Datasheets   Section B.8-B.8.4,B.8.9 Section 3.8
15-Mar Wednesday  FPGA Editor, Timing Report, Asynchronous Outputs   SROM Slides SROM Slides
17-Mar Friday Transmission Gates, Tri-state, Review Homework 6 Section B.8.7,B.8.8,B.8.10, Tri-state slides Section 3.9, Tri-state slides
Finals week 23-Mar Thursday 4-7pm Final exam