CMPE100/L Topic, homework, reading schedule -- Spring 2015

Disclaimer: This is a rough schedule of topics we will cover this quarter. It is subject to change. As mentioned in class, the lectures don't follow the text closely.
The readings listed are to provide some backup to the material covered in lecture. There are topics we will cover in the lecture which do not appear in the text.
Also we will often talk about the labs and design tools in class, either in anticipation of the Lab Assignments or in response to questions.
Week   Date Topics Due Reading 3rd Edition and Custom Text Reading 1st and 2nd Editions
1 30-Mar Monday Switching Theory, Boolean functions and expressions, Truth Tables   Section 2.1-2.3 Section 2.1-2.3
1-Apr Wednesday Course overview, Boolean Algebra   Section 2.5 Section 2.5
3-Apr Friday Logic networks, timing diagrams, Venn diagrams, Min-terms   Section 2.4 Section 2.4
2 6-Apr Monday Max-terms, Synthesis, SOP, POS, NAND-NAND, NOR-NOR   Section 2.6-2.8 Section 2.6-2.8
8-Apr Wednesday K-maps Homework 1 Section 2.11-2.12 Section 4.1-4.2
10-Apr Friday Multiplexers   Section 4.1-4.3 Sections 6.1-6.3
3 13-Apr Monday Kmaps SOP, POS   Section 2.13 Section 4.3
15-Apr Wednesday 5-variable Kmaps, Don't Cares Homework 2 Section 2.14 Section 4.4
17-Apr Friday The D Flip-Flop, shift registers, serial parity checker   Sections 5.7-5.8 Sections 7.7-7.8
4 20-Apr Monday Counters   Sections 5.9.2-5.9.3, 5.11-5.11.2, skip 5.9.1 Sections 7.9.2-7.9.3, 7.11-7.11.2, skip 7.9.1
22-Apr Wednesday Review Homework 3 Sections 5.9.2-5.9.3, 5.11-5.11.2, skip 5.9.1 Sections 7.9.2-7.9.3, 7.11-7.11.2, skip 7.9.1
24-Apr Friday Midterm 1      
5 27-Apr Monday Analysis of Sequential Circuit, State Diagram, Dead states, Synchronizers   Section 6.1, pages 397-398 Section 8.1, pages 555-556
29-Apr Wednesday Synthesis of Sequential Circuit, Mealy and Moore   Sections 6.1 and 6.3 Sections 8.1 and 8.3
1-May Friday Synthesis, One-Hot encoding   Section 6.2 Section 8.2
6 4-May Monday TAPS Bike Counter   Slides Slides
6-May Wednesday Arbiter, State Machine Rules, Lab 5 Homework 4 Section 6.8 Section 8.8
8-May Friday Combinational Loops, Mealy vs Moore      
7 11-May Monday State minimization   Section 6.6 Section 8.6
13-May Wednesday Other FFs, Activation tables, Modifying counters      
15-May Friday Lab 7 demo, Sequential multiplier   Section 7.4 Section 10.2.3
8 18-May Monday Sequential multiplier (cont), Horner's Rule      
20-May Wednesday Horner's Rule, Review Homework 5    
22-May Friday Midterm 2      
9 25-May Monday Holiday      
27-May Wednesday CMOS transistor networks   Sections B.1-B.3 Sections 3.1-3.3
29-May Friday CMOS, delay, static timing vs dynamic   Delay Slides Delay Slides
10 1-Jun Monday Design of D FFs and timing requirements   FF Slides, Sections 5.1-5.4 FF Slides, Sections 7.1-7.4
3-Jun Wednesday Timing Report, Noise Margins, Fanout, Datasheets, Transmission Gates, Tri-state   Section B.8-B.8.4,B.8.7-B.8.10 Section 3.8-3.9
5-Jun Friday FPGA Editor, Asynchronous Outputs Homework 6 SROM Slides SROM Slides
Finals week 9-Jun Tuesday 4-7pm Final exam      


The CMPE100 Web:
Copyright 2015; Department of Computer Engineering, University of California, Santa Cruz.

Portions of the CMPE100 Web may be reprinted or adapted for academic nonprofit purposes, providing the source is accurately quoted and duly credited.

Comments to: martine@cse.ucsc.edu