Disclaimer:  This is a rough schedule of topics we will cover this quarter. It is subject to change. As mentioned in class, the lectures don't follow the text closely. 
The readings listed are to provide some backup to the material covered in lecture.  There are topics we will cover in the lecture which do not appear in the text.  There are topics in the text we will not cover.
 Also we will often talk about the labs and design tools in class, either in anticipation of the Lab Assignments or in response to questions.
Week   Date Topics Due Reading 3rd Edition and Custom Text Reading 1st and 2nd Editions
0 28-Sep Friday Switching Theory, Boolean functions and expressions, Truth Tables   Section 2.1-2.3 Section 2.1-2.3
1 01-Oct Monday Course overview, Boolean Algebra   Section 2.5 Section 2.5
03-Oct Wednesday  Logic networks, timing diagrams, Venn diagrams, Min-terms   Section 2.4, 2.6-2.8 Section 2.4, 2.6-2.8
05-Oct Friday Max-terms, Synthesis, SOP, POS, NAND-NAND, NOR-NOR    Section 2.11-2.12 Section 4.1-4.2
2 08-Oct Monday K-maps Homework 1  Section 2.13 Section 4.3
10-Oct Wednesday  Kmaps SOP, POS   Section 4.1-4.3 Sections 6.1-6.3
12-Oct Friday Multiplexers   Section 2.13 Section 4.3
3 15-Oct Monday 5-variable Kmaps, Don't Cares Homework 2  Section 2.14 Section 4.4
17-Oct Wednesday  The D Flip-Flop, shift registers, serial parity checker   Sections 5.7-5.8 Sections 7.7-7.8
19-Oct Friday Counters   Sections 5.9.2-5.9.3, 5.11-5.11.2, skip 5.9.1 Sections 7.9.2-7.9.3, 7.11-7.11.2, skip 7.9.1
4 22-Oct Monday Analysis of Sequential Circuit, State Diagram, Dead states, Synchronizers Homework 3 Section 6.1, pages 397-398 Section 8.1, pages 555-556
24-Oct Wednesday  Overflow, review      
26-Oct Friday Midterm 1      
5 29-Oct Monday Synthesis of Sequential Circuit, Mealy and Moore   Sections 6.1 and 6.3 Sections 8.1 and 8.3
31-Oct Wednesday  Synthesis, One-Hot encoding   Section 6.2 Section 8.2
02-Nov Friday TAPS Bike Counter   Slides  Slides 
6 05-Nov Monday Arbiter, Mealy vs Moore, Combinational Loops,    Section 6.8 Section 8.8
07-Nov Wednesday  Combinational Loops, State minimization Homework 4 Section 6.6 Section 8.6
09-Nov Friday Other FFs, Activation tables, Modifying counters   Section 7.4 Section 10.2.3
7 12-Nov Monday HOLIDAY      
14-Nov Wednesday  Sequential multiplier Homework 5    
16-Nov Friday Lab 7 demo      
8 19-Nov Monday Midterm 2      
21-Nov Wednesday  Horner's Rule      
23-Nov Friday HOLIDAY      
9 26-Nov Monday CMOS transistor networks   Sections B.1-B.3 Sections 3.1-3.3
28-Nov Wednesday  CMOS, delay, static timing vs dynamic   Delay Slides Delay Slides
30-Nov Friday Design of D FFs and timing requirements   FF Slides, Sections 5.1-5.4 FF Slides, Sections 7.1-7.4
10 03-Dec Monday FFs(cont), Lab 8, Noise Margins, Fanout, Datasheets   Section B.8-B.8.4,B.8.9 Section 3.8
05-Dec Wednesday  FPGA Editor, Timing Report, Asynchronous Outputs   SROM Slides SROM Slides
07-Dec Friday Transmission Gates, Tri-state, Review Homework 6 Section B.8.7,B.8.8,B.8.10, Tri-state slides Section 3.9, Tri-state slides
Finals week 11-Dec Tuesday 12-3pm Final exam