SOLUTION TO HOMEWORK #5:
------------------------

9.6
   This method will fail when there are more than 25 parameters (32 general
   purpose registers minus the restricted registers $0, $1, $26, $27, $28,
   $29, $31).

9.9
   No, Pascal var types CANNOT be passed in registers.
   Pascal value types CAN be passed in registers.
   For the var parameters, the address of the variable must be passed to the
   procedure, while for the value parameters, the value of the variable is
   passed directly.

10.3
   The MAL code would be transformed to the following TAL code:

		.data
	count:	.word	0

		.text
	loop:	addi	$2, $0, 11
		add	$4, $18, $0
		syscall

		lui	$9, high_address (count)
		ori	$9, low_address (count)
		beq	$9, $0, loop

		addi	$2, $0, 10
		syscall

   The machine code for the above TAL code is:

	Address		Contents
	-------------------------------------------------------------------
  DATA	0x0004 4400	0000 0000 0000 0000 0000 0000 0000 0000


  TEXT	0x0008 8800	0010 0000 0000 0010 0000 0000 0000 1011
	0x0008 8804	0000 0010 0100 0000 0010 0000 0010 0000
	0x0008 8808	0000 0000 0000 0000 0000 0000 0000 1100

	0x0008 880c	0011 1100 0000 1001 0000 0000 0000 0100
	0x0008 8810	0011 0101 0010 1001 0100 0100 0000 0000
	0x0008 8814	0001 0001 0010 0000 1111 1111 1110 1000	

	0x0008 8818	0010 0000 0000 0010 0000 0000 0000 1010
	0x0008 881c	0000 0000 0000 0000 0000 0000 0000 1100


10.6
   If the calculated branch offset is too large to fit into the offset field
   of an instruction, the assembler can modify the program to jump to a closer
   instruction, which tells it to branch or jump to the desired instruction.

   As alternative solution would be for the assembler to replace the branch
   instruction with the instructions that load the address of the far away
   instruction into register $1, followed by an the instruction jr $1.

10.8
   The correct MIPS RISC aseembly TAL translation is:

		lui	$1, 0x0033
		ori	$1, $1, 0x8040
		sb	$18, 0($1)

10.10
   Two ways to translate MAL instruction bgt $3, $18, br_label into TAL:

   First way:	sub	$1, $18, $3
		blez	$1, br_label

   Second way:	sub	$1, $3, $18
		bgtz	$1, br_label

   Third way:	slt	$1, $3, $18
		beq	$1, $0, br_label

10.15
   One instruction thats likely to use $1 in TAL synthesis is a store
   instruction that uses an absolute addressing mode, for example,

		sw	$3, variable

   Its TAL synthesis is:

		lui	$1, high_addr
		ori	$1, $1, low_addr
		sw	$3, 0($1)


   Another instruction is the conditional branch instruction "blt" (or "bgt"),
   for example,

		blt	$11, $12, label

   would be synthesized as:

		sub	$1, $11, $12
		bltz	$1, label


11.2
   Once the printer jammed, the device would not become ready... ever!
   Hence, the spin wait-loop would become an endless loop.