5.1	ror x, y, 27


5.3(a)	  110010	-14
	+ 001011	+11
	--------	---
	  111101	- 3

   (b)	  001100	 12
	+ 011110	+30
	--------	---
	  101010	 42	OVERFLOW

   (c)	  00000001	  1
	+ 11111111	+-1
	----------	---
	  00000000	  0


5.6(a)	 33	   100001
	x 4	x     100
	---	---------
	132	 	0
		       00
		 10000100
		---------
		010000100

   (b)	  -1	  11111 11111
	x 12	x	01100
	----	-------------
	 -12	  11111 10100

   (c)	  22	  000000 010110
	x -5	x 111111 111011
	----	---------------
	-110	  111110 010010

   (d)   -18	  111111 101110
	x-16	x 111111 110000
	----	---------------
	 288	  000100 100000


5.14	Yes, sra x, y, 1 can be synthesized by the SAL code

		bgez	y, else
		rol	x, y, 31
		or	x, x, 0x80000000
	else:	rol	x, y, 31
		and	x, x, 0x7fffffff

	This code could be placed within a loop to arithmetically shift by
	more than one place.

6.3(a)	3.6 + 10.1
	
	(3.6)	0 10000000 1100110	=>	0 10000010 (0)0111001
	(10.1) 	0 10000010 0100001	=>	0 10000010 (1)0100001
	------------------------------------------------------------
						0 10000010 (1)1011010
   (b)	205 + 1

	(205)	0 10000110 1001101	=>	0 10000110 (1)1001101
	(1)	0 01111111 0000000	=>	0 10000110 (0)0000001
	-------------------------------------------------------------
						0 10000110 (1)1001110

   (c) 18.25 + 5200

	(18.25)	0 10000011 0010010	=>	0 10001011 (0)0000000
	(5200)	0 10001011 0100010	=>	0 10001011 (1)0100010
	-------------------------------------------------------------
						0 10001011 (1)0100010

   (d) -65 + 106

	(-65)	1 10000101 (1)0000010
	(106)	0 10000101 (1)1010100

	Convert mantissas to 2's complement and add
		(1)0000010	=> 0000 10000010 (converted since -ve)
		(1)1010100	=> 1111 00101100 (no conversion since +ve)
				  --------------
				   1111 10101110

	Convert result back to sign-magnitude => 0000 (0)1010010

	Normalize the result by shifting left one-bit, adjust exponent
	by decreasing its value by 1.

	Result: 0 10000100 (1)0100100


6.5(a)	20 x 3

	(20)	0   10000011 		(1)0100000
	(3)	0 + 10000000 	      x (1)1000000
	------------------------------------------
		0  100000011	111 1000 0000 0000

	Subtract 127 from resulting exponent=> we get 10000100

	Result: 0 10000100 (1)1110000

   (b) 1.6 x -2.25

	(1.6)	0   01111111		(1)1001100
	(-2.25)	1 + 10000000	      x (1)0010000
	-------------------------------------------
		1   11111111	111 0010 1100 0000

	Subtract 127 from resulting exponent => we get 10000000

	Result: 0 10000000 (1)1100101

   (c) 0.005 x 100

	(0.005)	0   01110111		(1)0100011
	(100)	0 + 10000101	      x (1)1001000
	------------------------------------------
		0   11111100	111 1111 0101 1000

	Subtract 127 from resulting exponent => we get 01111101

	Result: 0 01111101 (1)1111110


6.9	The IEEE representation for 0.3 is
		0 01111101 (1)001 1001 1001 1001 1010
	The difference between 0.3 and the exact value of this representation
	is less than 0.00009


6.10	The IEEE rep. for 1.0 is
		0 01111111 (1)000 0000 0000 0000 0000 0000

	When 1.0 is added to the no:
		0 01100111 (1)000 0000 0000 0000 0000 0000
	or any other no. smaller than this, the result will be 1.0.
	This is because the alignment of radix points causes the hidden bit
	to be shifted right 24 places. The precision is not large enough to
	represent shifted value.


6.13	The steps in an addition require time to adjust the radix point,
	followed by time to add mantissas, followed by normalization of
	result.
	A multiplication may require many additions followed by normalization
	of result.
	Separate hardware can be built to add the exponents, such that the
	additions can be done in parallel. If the time to adjust radix points
	is greater than that of the additions (in the multiply), then
	multiplication can be faster than addition.