; Startup Runtime Code for 12c 68hc11 laboratory projects ; This code is needed when using either the simulator only, or when ; producing files for download to the 12c trainer board. Sections are ; conditionally assembled depending on whether the target is the simulator ; or trainer board. ; ; The following should be the first line in your code when you want to run your ; program from within the simulator: ; $SET simulate ; ; When you are ready to download it to the 12c trainer board, the line should ; read: ; $SETNOT simulate ; ; The memory map is identical to the 12c trainer board, so REGBS EQU $8000 ;start of hc11 64-byte register block ROMBS EQU $8040 ;start of ROM RAMBS EQU $0000 ;start of RAM ************************************************************************** * these equates define i/o devices (as ports) implemented on the 12c * trainer board 68HC11 SWITCHES EQU $7C00 ;switches LCD_CMD EQU $7c80 ;lcd command LCD_CHAR EQU $7c81 ;lcd character LEDS EQU $7d00 ;leds DAC EQU $7d80 ;D/A IOCS4 EQU $7e00 ;io expansion port IOCS5 EQU $7e80 ; " IOCS6 EQU $7f00 ; " IOCS7 EQU $7f80 ; " NULL EQU $00 ;end of text/table user_isr EQU $7BC0 ;base of user interrupt jump table _gocode EQU $8040 ;beginning of user monitor code ************************************************************************** * Some of the internal 64 registers are defined here. Their definitions * should be self-evident from the Motorola manuals. BAUD EQU REGBS+$2B ;sci baud register SCCR1 EQU REGBS+$2C ;sci control1 register SCCR2 EQU REGBS+$2D ;sci control2 register SCSR EQU REGBS+$2E ;sci status register SCDR EQU REGBS+$2F ;sci data register $IF simulate ************************************************************************** * 68hc11 interrupt ROM interrupt vector table. This ordinal table begins * at 0xffd6 and ends at 0xffff. Each vector entry is 16 bits and points * into a user-editable area of RAM * ORG $FFD6 DW user_isr ; SCI DW user_isr+3T ; SPI DW user_isr+6T ; Pulse acc input DW user_isr+9T ; Pulse acc overf DW user_isr+12T ; Timer overf DW user_isr+15T ; Output compare 5 DW user_isr+18T ; Output compare 4 DW user_isr+21T ; Output compare 3 DW user_isr+24T ; Output compare 2 DW user_isr+27T ; Output compare 1 DW user_isr+30T ; Input capture 3 DW user_isr+33T ; Input capture 2 DW user_isr+36T ; Input capture 1 DW user_isr+39T ; Real time DW user_isr+42T ; IRQ DW user_isr+45T ; XIRQ DW user_isr+48T ; SWI DW user_isr+51T ; illegal DW user_isr+54T ; cop fail DW user_isr+57T ; cop clock fail DW _gocode ; RESET *********************************************************** * Procedure ISRSTUB ORG $7bff isrstub: RTI *********************************************************** * User ISR vector area. * ORG user_isr JMP isrstub ; SCI JMP isrstub ; SPI JMP isrstub ; Pulse acc input JMP isrstub ; Pulse acc overf JMP isrstub ; Timer overf JMP isrstub ; Output compare 5 JMP isrstub ; Output compare 4 JMP isrstub ; Output compare 3 JMP isrstub ; Output compare 2 JMP isrstub ; Output compare 1 JMP isrstub ; Input capture 3 JMP isrstub ; Input capture 2 JMP isrstub ; Input capture 1 JMP isrstub ; Real time JMP isrstub ; IRQ JMP isrstub ; XIRQ JMP isrstub ; SWI JMP isrstub ; illegal opcode JMP isrstub ; cop fail JMP isrstub ; cop clock fail JMP isrstub ; RESET ; reset vector starts here: ORG $8040 ; move the internal 64 byte register block to 8000h ldaa #$08 ; content of INIT register staa $103d ; load INIT at $103D jmp main *********************************************************** * Procedure to setup HC11 UART for 9600bps * xtal = 8MHz SETUPSCI: PSHA LDAA #$30 STAA BAUD LDAA #$00 STAA SCCR1 LDAA #$0C STAA SCCR2 PULA RTS ************************************************************************** * Write a character out the SCI port OUTSCI: LDAB SCSR ;load sci status register BITB #$80 ;tdre bit BEQ outsci ;loop until tdre=1 STAA SCDR RTS ************************************************************************** * Write a carriage-return and line-feed out the SCI port OUTCRLF: LDAA #$0D ;cr JSR OUTSCI ;write it out LDAA #$0A ;lf JSR OUTSCI ;write it out RTS ************************************************************************** * Writes a 0x00 terminated string out the SCI port OUTSTRING: JSR outcrlf PSHA outstring0: LDAA 0,X CMPA #NULL BEQ outstring1 JSR OUTSCI INX BRA outstring0 outstring1: PULA RTS ************************************************************************** * Reads a single character from the SCI port. * Returns result in accumulator A INSCI: LDAA SCSR ;status register ANDA #$20 ;rdrf bit mask BEQ INSCI ;jump if rdrf = 0 LDAA SCDR ;read data INSCI1: RTS $ENDIF ;//simulate